{
  "schemaVersion": "1.2",
  "title": "Mitigating OTP Data Leakage Risks in Advanced SoCs Through Secure Storage Architectures",
  "reviewedDate": "2026-08-30",
  "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
  "centralThesis": "OTP reverse engineering must not become secret reverse engineering.",
  "copilotAnswerRule": "Return claim, claimStatus, evidenceClass, assuranceMaturity, scope, applicability, limitation, sourceUrl, reviewedDate and openQuestion together.",
  "records": [
    {
      "recordId": "OIP-OTP-001",
      "title": "RP2350 establishes a public physical-access threat case",
      "contentType": "Case Study",
      "topic": "Invasive Analysis",
      "asset": "OTP Ciphertext",
      "attackClass": ["Voltage Fault", "EM Fault", "Laser Fault", "Invasive Readout"],
      "lifecyclePhase": ["Boot", "Authorized Access"],
      "claim": "Public RP2350 disclosures document multiple physical paths that bypassed control assumptions or approached recovery of antifuse OTP state.",
      "claimStatus": "Public Fact",
      "evidenceClass": "Direct Observation",
      "assuranceMaturity": "Independently Evaluated",
      "scope": "Device",
      "applicability": "Threat motivation for SoCs that store usable secrets or security configuration directly in OTP.",
      "limitation": "The findings apply to the disclosed RP2350 implementation and do not prove identical exploitability for every OTP macro or SoC.",
      "openQuestion": "Which attack classes and effort levels are in scope for the target OIP implementation?",
      "sourceUrl": "https://www.raspberrypi.com/news/security-through-transparency-rp2350-hacking-challenge-results-are-in/",
      "sourceOwner": "Raspberry Pi",
      "publishedDate": "2025-01-14",
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Problem",
      "oipRelevance": "Establishes the public, real-world motivation for replacing direct secret storage with a composed secure-storage boundary."
    },
    {
      "recordId": "OIP-OTP-002",
      "title": "FIB/PVC can reveal antifuse physical state",
      "contentType": "Evidence",
      "topic": "Invasive Analysis",
      "asset": "OTP Ciphertext",
      "attackClass": ["Invasive Readout"],
      "lifecyclePhase": ["Power-off"],
      "claim": "IOActive reported using FIB/PVC to recover the bitwise OR of adjacent RP2350 antifuse bits; complete per-bit recovery was considered possible in principle but was not demonstrated.",
      "claimStatus": "Public Fact",
      "evidenceClass": "Direct Observation",
      "assuranceMaturity": "Independently Evaluated",
      "scope": "Device",
      "applicability": "Demonstrates that bit-cell opacity is not a sufficient final confidentiality boundary for valuable secrets.",
      "limitation": "The demonstrated result was adjacent-bit OR recovery, not complete per-bit secret extraction; equipment, preparation, skill, time, and exact recoverability depend on the device and target layout.",
      "openQuestion": "What invasive-readout evaluation has been completed on the target macro and node?",
      "sourceUrl": "https://www.ioactive.com/raspberry-pi-2350-hacking-challenge/",
      "sourceOwner": "IOActive",
      "publishedDate": "2025-01-14",
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Threat Evidence",
      "oipRelevance": "Provides the strongest public evidence that physical OTP state can become observable under a capable invasive attacker while preserving the demonstrated recovery limit."
    },
    {
      "recordId": "OIP-ARCH-001",
      "title": "Secure Storage combines four security functions",
      "contentType": "Architecture",
      "topic": "Architecture",
      "asset": "Controller Policy",
      "attackClass": ["Invasive Readout", "Protocol Abuse"],
      "lifecyclePhase": ["Boot", "Derive", "Authorized Access", "Zeroize"],
      "claim": "The disclosed solution integrates antifuse OTP, SRAM PUF, an AES-256 cryptographic engine, and a Secure Controller with address scrambling.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Claimed",
      "scope": "Subsystem",
      "applicability": "Defines the product architecture and integration boundary presented to advanced-node SoC teams.",
      "limitation": "Public architecture disclosure does not establish implementation-specific resistance to FI, SCA, or invasive analysis.",
      "openQuestion": "Which countermeasures and evaluation reports apply to the exact licensed configuration?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/memories-logic-libraries/secure-storage-otp-ip.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Architecture",
      "oipRelevance": "Defines the four-function subsystem that separates persistent ciphertext from reconstructed and policy-controlled secrets."
    },
    {
      "recordId": "OIP-PUF-001",
      "title": "The root key is reconstructed rather than permanently stored",
      "contentType": "Mechanism",
      "topic": "Architecture",
      "asset": "Root Key",
      "attackClass": ["Invasive Readout", "Power SCA", "EM SCA"],
      "lifecyclePhase": ["Power-off", "Boot", "Derive", "Zeroize"],
      "claim": "The SRAM PUF generates a device-specific root at power-up; Synopsys states that this root is never stored on-chip.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Claimed",
      "scope": "IP",
      "applicability": "Reduces permanent root-secret residency and separates storage readout from root recovery.",
      "limitation": "Runtime key exposure, helper data, reconstruction logic, scan paths, fault behavior, and zeroization remain assurance targets.",
      "openQuestion": "What is the measured key-residency window and how is zeroization verified?",
      "sourceUrl": "https://www.synopsys.com/articles/secure-storage-solution-otp-ip.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Lifecycle",
      "oipRelevance": "Explains why power-up reconstruction and verified zeroization are stronger than permanently storing the usable root key."
    },
    {
      "recordId": "OIP-CRYPTO-001",
      "title": "AES-256 creates the confidentiality boundary for OTP contents",
      "contentType": "Mechanism",
      "topic": "Countermeasure",
      "asset": "OTP Ciphertext",
      "attackClass": ["Invasive Readout", "Power SCA", "EM SCA", "Voltage Fault"],
      "lifecyclePhase": ["Derive", "Authorized Access"],
      "claim": "OTP contents are protected by AES encryption and decryption using 256-bit keys derived from the SRAM-PUF root.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Claimed",
      "scope": "Subsystem",
      "applicability": "Changes the intended consequence of physical OTP recovery from plaintext retrieval to ciphertext retrieval.",
      "limitation": "Confidentiality depends on cryptographic implementation, modes, key derivation, integrity policy, FI/SCA resistance, and lifecycle correctness.",
      "openQuestion": "Which crypto assurance evidence and attack evaluations apply to the delivered engine?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/memories-logic-libraries/secure-storage-otp-ip.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Architecture",
      "oipRelevance": "Connects PUF-derived keying to the confidentiality boundary around physically observable OTP contents."
    },
    {
      "recordId": "OIP-SYS-001",
      "title": "OTP readout can be decoupled from secret recovery",
      "contentType": "System Inference",
      "topic": "Architecture",
      "asset": "Plaintext Window",
      "attackClass": ["Invasive Readout", "Protocol Abuse", "Voltage Fault"],
      "lifecyclePhase": ["Power-off", "Boot", "Derive", "Authorized Access", "Zeroize"],
      "claim": "When encryption, scrambling, key reconstruction, controller policy, and lifecycle controls all hold, physical OTP recovery should yield scrambled ciphertext rather than a usable secret.",
      "claimStatus": "Analyst Inference",
      "evidenceClass": "Bounded Inference",
      "assuranceMaturity": "Specified",
      "scope": "Subsystem",
      "applicability": "Central system-security thesis for the OIP presentation.",
      "limitation": "This is a composed inference, not a certified result; every dependency requires configuration- and node-specific closure.",
      "openQuestion": "Which evidence demonstrates the composed outcome on target silicon?",
      "sourceUrl": "https://www.synopsys.com/articles/secure-storage-solution-otp-ip.html",
      "sourceOwner": "NVM Knowledge Hub",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Consequence",
      "oipRelevance": "States the intended security outcome while preserving the distinction between architectural reasoning and evaluated silicon evidence."
    },
    {
      "recordId": "OIP-PUF-SCALE-001",
      "title": "Synopsys reports SRAM PUF deployment in more than 1.5 billion devices",
      "contentType": "Portfolio Evidence",
      "topic": "Evidence",
      "asset": "PUF Root Key",
      "attackClass": [],
      "lifecyclePhase": ["Power-off", "Boot", "Derive"],
      "claim": "Synopsys reports that its SRAM PUF technology has been deployed in more than 1.5 billion devices worldwide.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Field-proven",
      "scope": "Portfolio",
      "applicability": "Provides public portfolio-scale context for SRAM PUF adoption and field experience.",
      "limitation": "The figure applies to the underlying Synopsys SRAM PUF technology; it is not a shipment count for Automotive PUF Premium or proof of the target Secure Storage configuration.",
      "openQuestion": "Which PUF product, version, process node, and delivered configuration apply to the target SoC?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/security-ip/cryptography-ip/puf/automotive-security.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-30",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Portfolio Context",
      "oipRelevance": "Supports an attributed adoption-scale statement without implying configuration-specific assurance."
    },
    {
      "recordId": "OIP-PUF-HISTORY-001",
      "title": "Synopsys reports more than 15 years of proven SRAM PUF technology",
      "contentType": "Portfolio Evidence",
      "topic": "Evidence",
      "asset": "PUF Root Key",
      "attackClass": [],
      "lifecyclePhase": ["Power-off", "Boot", "Derive"],
      "claim": "Synopsys describes its SRAM PUF technology as proven over more than 15 years.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Field-proven",
      "scope": "Portfolio",
      "applicability": "Provides public maturity context for the SRAM PUF technology foundation.",
      "limitation": "The duration is a technology-lineage claim and must not be generalized to every Synopsys security or NVM product, release, node, or Secure Storage configuration.",
      "openQuestion": "Which reliability, certification, and field-evidence artifacts transfer to the exact licensed PUF configuration?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/security-ip/cryptography-ip/puf/automotive-security.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-30",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Portfolio Context",
      "oipRelevance": "Supports a scoped technology-maturity statement while preserving the target-configuration evidence gate."
    },
    {
      "recordId": "OIP-OTP-SCALE-001",
      "title": "Synopsys reports more than 10 billion antifuse OTP NVM units shipped",
      "contentType": "Portfolio Evidence",
      "topic": "Evidence",
      "asset": "OTP Ciphertext",
      "attackClass": [],
      "lifecyclePhase": ["Power-off"],
      "claim": "Synopsys reports that its antifuse OTP NVM portfolio has shipped in more than 10 billion units.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Field-proven",
      "scope": "Portfolio",
      "applicability": "Provides public shipment-scale context for Synopsys antifuse OTP NVM adoption.",
      "limitation": "The figure is a portfolio-level unit count; it does not describe every current OTP product generation and does not prove Secure Storage, PUF integration, or attack assurance for a target configuration.",
      "openQuestion": "Which OTP macro, process node, qualification evidence, and Secure Storage add-on apply to the target SoC?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-30",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Portfolio Context",
      "oipRelevance": "Supports an attributed OTP adoption-scale statement without conflating shipment volume with subsystem assurance."
    },
    {
      "recordId": "OIP-NODE-001",
      "title": "Advanced-node OTP has published silicon evidence",
      "contentType": "Platform Evidence",
      "topic": "Evidence",
      "asset": "Controller Policy",
      "attackClass": [],
      "lifecyclePhase": ["Power-off"],
      "claim": "Synopsys publicly lists advanced-node OTP as silicon-verified in TSMC N3P, N4P, N5, N5A, N6, N7, and N7A, with N5A and N7A Grade 1 qualification to AEC-Q100.",
      "claimStatus": "Vendor Claim",
      "evidenceClass": "Vendor Disclosure",
      "assuranceMaturity": "Claimed",
      "scope": "IP",
      "applicability": "Supports platform readiness discussion for OIP audiences.",
      "limitation": "OTP macro availability does not automatically prove Secure Storage release, PUF integration, or security evaluation for every listed node.",
      "openQuestion": "What exact node and macro are targeted, and which Secure Storage deliverables are released for that configuration?",
      "sourceUrl": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
      "sourceOwner": "Synopsys",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Platform Readiness",
      "oipRelevance": "Supports an advanced-node readiness discussion without conflating OTP silicon status with complete Secure Storage assurance."
    },
    {
      "recordId": "OIP-VAL-001",
      "title": "Attack resilience remains an evidence gate",
      "contentType": "Open Question",
      "topic": "Certification",
      "asset": "Controller Policy",
      "attackClass": ["Power SCA", "EM SCA", "Voltage Fault", "Clock Fault", "EM Fault", "Laser Fault", "Invasive Readout", "Protocol Abuse"],
      "lifecyclePhase": ["Boot", "Derive", "Authorized Access", "Zeroize"],
      "claim": "Architecture documentation alone is insufficient to claim resistance to scoped physical attacks on a specific implementation.",
      "claimStatus": "Unknown",
      "evidenceClass": "Unknown",
      "assuranceMaturity": "Specified",
      "scope": "SoC",
      "applicability": "Defines the validation workstream and prevents overclaiming in the OIP deck.",
      "limitation": "No product-specific FI/SCA/invasive report was supplied for this knowledge package.",
      "openQuestion": "Who owns the evidence plan, target assurance level, laboratory scope, and acceptance criteria?",
      "sourceUrl": "https://www.keysight.com/us/en/products/vulnerability-assessment/device-vulnerability-analysis/fault-injection.html",
      "sourceOwner": "NVM Knowledge Hub",
      "publishedDate": null,
      "reviewedDate": "2026-08-18",
      "owner": "NVM Knowledge Hub",
      "classification": "Public",
      "audience": ["TSMC OIP", "SoC Security Architects", "NVM IP Integrators", "Product Security"],
      "presentationRole": "Validation Gate",
      "oipRelevance": "Makes missing implementation-specific evidence visible and turns it into an explicit OIP decision and ownership gate."
    }
  ]
}
